RstSync Entity Reference

Inherits Synchronizer.

Inherited by MasterAxiLiteIpIntegrator, SlaveAxiLiteIpIntegrator, AxiLiteAsync, MasterAxiStreamIpIntegrator, SlaveAxiStreamIpIntegrator, AxiStreamMon, AxiStreamMonAxiL, AxiStreamRingBuffer, MasterAxiIpIntegrator, SlaveAxiIpIntegrator, FifoMux, PwrUpRst, SynchronizerOneShot, Pgp3RxEb, SrpV3AxiLite, Ad9249ReadoutGroup, Ad9249Group, Ad9249ReadoutGroup2, AxiAd9467Reg, Ad9681Readout, Ad9681ReadoutManual, Ad9681, AxiLtc2270Reg, Sgmii88E1111LvdsUltraScale, TenGigEthGthUltraScaleRst, TenGigEthGtyUltraScaleRst, XauiGth7, XauiGthUltraScale, XauiGtx7, XauiGtyUltraScale, ClinkDataClk, ClinkData, CoaXPressOverFiberGthUsIpWrapper, CoaXPressOverFiberGtyUsIpWrapper, GLinkGtx7Core, Pgp2bGth7Fixedlat, Pgp2bGth7MultiLane, Pgp2bGtp7FixedLat, Pgp2bGtp7FixedLatWrapper, Pgp2bGtp7MultiLane, Pgp2bGtx7Fixedlat, Pgp2bGtx7FixedLatWrapper, Pgp2bGtx7VarLatWrapper, Pgp2fcAlignmentChecker, Pgp2fcAlignmentController, Pgp2fcGthCoreWrapper, Pgp2fcGtp7, Pgp2fcGtp7Wrapper, Pgp2fcGtyCoreWrapper, Pgp3GthUsIpWrapper, Pgp3Gtp7IpWrapper, Pgp3Gtp7Wrapper, Pgp3GtyUsIpWrapper, Pgp4Gtp7Wrapper, SaltDelayCtrl, DeviceDna7Series, Iprog7Series, DeviceDnaUltraScale, IprogUltraScale, SelectioDeserUltraScale, Gtp16FixedLatCore, and GtpDualFixedLatCore.

Collaboration diagram for RstSync:

Entities
RstSync.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
StdRtlPkg	Package <StdRtlPkg>

Generics
TPD_G	time := 1 ns
IN_POLARITY_G	std_logic := ' 1 '
OUT_POLARITY_G	std_logic := ' 1 '
BYPASS_SYNC_G	boolean := false
RELEASE_DELAY_G	integer range 3 to ( 2 ** 24 ) := 3
OUT_REG_RST_G	boolean := true

Ports
clk	in	sl
asyncRst	in	sl
syncRst	out	sl

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The documentation for this design unit was generated from the following files:

• base/sync/rtl/RstSync.vhd
• build/SRC_VHDL/surf/RstSync.vhd