ClinkData Entity Reference

Inheritance diagram for ClinkData:

Collaboration diagram for ClinkData:

Entities
ClinkData.rtl	architecture

Libraries
ieee
surf
unisim

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiLitePkg	Package <AxiLitePkg>
ClinkPkg	Package <ClinkPkg>
vcomponents

Generics
TPD_G	time := 1 ns
XIL_DEVICE_G	string := " 7SERIES "

Ports
cblHalfP	inout	slv ( 4 downto 0 )
cblHalfM	inout	slv ( 4 downto 0 )
dlyClk	in	sl
dlyRst	in	sl
sysClk	in	sl
sysRst	in	sl
linkConfig	in	ClLinkConfigType
linkStatus	out	ClLinkStatusType
parData	out	slv ( 27 downto 0 )
parValid	out	sl
parReady	in	sl
axilReadMaster	in	AxiLiteReadMasterType
axilReadSlave	out	AxiLiteReadSlaveType
axilWriteMaster	in	AxiLiteWriteMasterType
axilWriteSlave	out	AxiLiteWriteSlaveType

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The documentation for this design unit was generated from the following file:

• protocols/clink/rtl/ClinkData.vhd