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ClinkDataClk Entity Reference
Inheritance diagram for ClinkDataClk: Collaboration diagram for ClinkDataClk:Entities | |
| ClinkDataClk.rtl | architecture |
Libraries | |
| ieee | |
| unisim | |
| surf | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_unsigned | |
| std_logic_arith | |
| math_real | |
| vcomponents | |
| StdRtlPkg | Package <StdRtlPkg> |
| AxiLitePkg | Package <AxiLitePkg> |
Generics | |
| TPD_G | time := 1 ns |
| REG_BUFF_EN_G | boolean := false |
Ports | ||
| clkIn | in | sl |
| rstIn | in | sl |
| clinkClk7x | out | sl |
| clinkClk | out | sl |
| clinkRst | out | sl |
| sysClk | in | sl |
| sysRst | in | sl |
| axilReadMaster | in | AxiLiteReadMasterType |
| axilReadSlave | out | AxiLiteReadSlaveType |
| axilWriteMaster | in | AxiLiteWriteMasterType |
| axilWriteSlave | out | AxiLiteWriteSlaveType |
The documentation for this design unit was generated from the following files:
- protocols/clink/7Series/ClinkDataClk.vhd
- protocols/clink/UltraScale/ClinkDataClk.vhd
