RssiCoreWrapper.mapping Architecture Reference

Architecture >> RssiCoreWrapper::mapping

Processes
PROCESS_146	( clk_i )
PROCESS_356	( clk_i )

Constants
PACKETIZER_AXIS_CONFIG_C	AxiStreamConfigType := ( TSTRB_EN_C = > false , TDATA_BYTES_C = > 8 , TDEST_BITS_C = > 8 , TID_BITS_C = > 8 , TKEEP_MODE_C = > TKEEP_COMP_C , TUSER_BITS_C = > 8 , TUSER_MODE_C = > TUSER_FIRST_LAST_C )
CONV_AXIS_CONFIG_C	AxiStreamConfigType := ite ( BYPASS_CHUNKER_G , RSSI_AXIS_CONFIG_C , PACKETIZER_AXIS_CONFIG_C )
MAX_SEGS_BITS_C	positive := bitSize ( MAX_SEG_SIZE_G )

Signals
rxMasters	AxiStreamMasterArray ( APP_STREAMS_G- 1 downto 0 )
rxSlaves	AxiStreamSlaveArray ( APP_STREAMS_G- 1 downto 0 )
depacketizerMasters	AxiStreamMasterArray ( 1 downto 0 )
depacketizerSlaves	AxiStreamSlaveArray ( 1 downto 0 )
packetizerMasters	AxiStreamMasterArray ( 1 downto 0 )
packetizerSlaves	AxiStreamSlaveArray ( 1 downto 0 )
txMasters	AxiStreamMasterArray ( APP_STREAMS_G- 1 downto 0 )
txSlaves	AxiStreamSlaveArray ( APP_STREAMS_G- 1 downto 0 )
statusReg	slv ( 8 downto 0 )
rssiNotConnected	sl
rssiConnected	sl
maxObSegSize	slv ( 15 downto 0 )
maxSegs	slv ( MAX_SEGS_BITS_C- 1 downto 0 )
ileaveRearb	slv ( 11 downto 0 )

Instantiations
u_rx	AxiStreamResize <Entity AxiStreamResize>
u_axistreammux	AxiStreamMux <Entity AxiStreamMux>
u_packetizer	AxiStreamPacketizer <Entity AxiStreamPacketizer>
u_packetizer	AxiStreamPacketizer2 <Entity AxiStreamPacketizer2>
u_rssicore	RssiCore <Entity RssiCore>
u_depacketizer	AxiStreamDepacketizer <Entity AxiStreamDepacketizer>
u_depacketizer	AxiStreamDepacketizer2 <Entity AxiStreamDepacketizer2>
u_axistreamdemux	AxiStreamDeMux <Entity AxiStreamDeMux>
u_tx	AxiStreamResize <Entity AxiStreamResize>
u_rx	AxiStreamResize <Entity AxiStreamResize>
u_axistreammux	AxiStreamMux <Entity AxiStreamMux>
u_packetizer	AxiStreamPacketizer <Entity AxiStreamPacketizer>
u_packetizer	AxiStreamPacketizer2 <Entity AxiStreamPacketizer2>
u_rssicore	RssiCore <Entity RssiCore>
u_depacketizer	AxiStreamDepacketizer <Entity AxiStreamDepacketizer>
u_depacketizer	AxiStreamDepacketizer2 <Entity AxiStreamDepacketizer2>
u_axistreamdemux	AxiStreamDeMux <Entity AxiStreamDeMux>
u_tx	AxiStreamResize <Entity AxiStreamResize>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/RssiCoreWrapper.vhd
• protocols/rssi/v1/rtl/RssiCoreWrapper.vhd