AxiStreamPacketizer Entity Reference

Inheritance diagram for AxiStreamPacketizer:

Collaboration diagram for AxiStreamPacketizer:

Entities
AxiStreamPacketizer.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
numeric_std
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
SsiPkg	Package <SsiPkg>

Generics
TPD_G	time := 1 ns
RST_ASYNC_G	boolean := false
MAX_PACKET_BYTES_G	integer := 1440
MIN_TKEEP_G	slv ( 7 downto 0 ) := x " 01 "
OUTPUT_SSI_G	boolean := true
INPUT_PIPE_STAGES_G	integer := 0
OUTPUT_PIPE_STAGES_G	integer := 0

Ports
axisClk	in	sl
axisRst	in	sl
maxPktBytes	in	slv ( bitSize ( MAX_PACKET_BYTES_G ) - 1 downto 0 ) := toSlv ( MAX_PACKET_BYTES_G , bitSize ( MAX_PACKET_BYTES_G ) )
sAxisMaster	in	AxiStreamMasterType
sAxisSlave	out	AxiStreamSlaveType
mAxisMaster	out	AxiStreamMasterType
mAxisSlave	in	AxiStreamSlaveType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/AxiStreamPacketizer.vhd
• protocols/packetizer/rtl/AxiStreamPacketizer.vhd