Architecture >> Ad9249ReadoutGroup::rtl

Processes
axilComb	( adcFrameSync , axilR , axilReadMaster , axilRst , axilWriteMaster , curDelayData , curDelayFrame , debugDataTmp , debugDataValid , lockedFallCount , lockedSync )
axilSeq	( axilClk )
adcComb	( adcData , adcFrame , adcR , invertSync )
adcSeq	( adcBitClkR , adcBitRst )
axilComb	( adcClkRst , adcFrameSync , axilR , axilReadMaster , axilRst , axilWriteMaster , curDelayData , curDelayFrame , debugData , debugDataValid , lockedFallCount , lockedSync )
axilSeq	( axilClk )
adcComb	( adcData , adcDataValid , adcFrame , adcFrameValid , adcR , invertSync )
adcSeq	( adcBitClkDiv4 )

Constants
AXIL_REG_INIT_C	AxilRegType := ( axilWriteSlave = > AXI_LITE_WRITE_SLAVE_INIT_C , axilReadSlave = > AXI_LITE_READ_SLAVE_INIT_C , delay = > DEFAULT_DELAY_G , dataDelaySet = > ( others = > ' 1 ' ) , frameDelaySet = > ' 1 ' , freezeDebug = > ' 0 ' , readoutDebug0 = > ( others = > ( others = > ' 0 ' ) ) , readoutDebug1 = > ( others = > ( others = > ' 0 ' ) ) , lockedCountRst = > ' 0 ' , invert = > ' 0 ' , curDelayFrame = > ( others = > ' 0 ' ) , curDelayData = > ( others = > ( others = > ' 0 ' ) ) )
ADC_REG_INIT_C	AdcRegType := ( slip = > ' 0 ' , count = > ( others = > ' 0 ' ) , locked = > ' 0 ' , fifoWrData = > ( others = > ( others = > ' 0 ' ) ) )
FRAME_PATTERN_C	slv ( 13 downto 0 ) := " 11111110000000 "
AXIL_REG_INIT_C	AxilRegType := ( axilWriteSlave = > AXI_LITE_WRITE_SLAVE_INIT_C , axilReadSlave = > AXI_LITE_READ_SLAVE_INIT_C , delay = > DEFAULT_DELAY_G , dataDelaySet = > ( others = > ' 1 ' ) , frameDelaySet = > ' 1 ' , freezeDebug = > ' 0 ' , readoutDebug0 = > ( others = > ( others = > ' 0 ' ) ) , readoutDebug1 = > ( others = > ( others = > ' 0 ' ) ) , lockedCountRst = > ' 0 ' , invert = > ' 0 ' )
ADC_REG_INIT_C	AdcRegType := ( slip = > ' 0 ' , count = > ( others = > ' 0 ' ) , locked = > ' 0 ' , fifoWrData = > ( others = > ( others = > ' 0 ' ) ) , fifoWrDataEn = > ( others = > ' 0 ' ) )

Signals
lockedSync	sl
lockedFallCount	slv ( 15 downto 0 )
axilR	AxilRegType := AXIL_REG_INIT_C
axilRin	AxilRegType
adcR	AdcRegType := ADC_REG_INIT_C
adcRin	AdcRegType
tmpAdcClk	sl
adcBitClkIo	sl
adcBitClkIoInv	sl
adcBitClkR	sl
adcBitRst	sl
adcFramePad	sl
adcFrame	slv ( 13 downto 0 )
adcFrameSync	slv ( 13 downto 0 )
adcDataPadOut	slv ( NUM_CHANNELS_G- 1 downto 0 )
adcDataPad	slv ( NUM_CHANNELS_G- 1 downto 0 )
adcData	Slv14Array ( NUM_CHANNELS_G- 1 downto 0 )
curDelayFrame	slv ( 4 downto 0 )
curDelayData	slv5Array ( NUM_CHANNELS_G- 1 downto 0 )
fifoDataValid	sl
fifoDataOut	*slv ( NUM_CHANNELS_G 16 - 1 downto 0 )**
fifoDataIn	*slv ( NUM_CHANNELS_G 16 - 1 downto 0 )**
fifoDataTmp	slv16Array ( NUM_CHANNELS_G- 1 downto 0 )
debugDataValid	sl
debugDataOut	*slv ( NUM_CHANNELS_G 16 - 1 downto 0 )**
debugDataTmp	slv16Array ( NUM_CHANNELS_G- 1 downto 0 )
invertSync	sl
adcDataValid	slv ( NUM_CHANNELS_G- 1 downto 0 )
adcFrameValid	sl
adcDclk	sl
adcBitClk	sl
adcBitClkDiv4	sl
adcBitRstDiv4	sl
adcClkRstSync	sl
curDelayFrame	slv ( 8 downto 0 )
curDelayData	slv9Array ( NUM_CHANNELS_G- 1 downto 0 )
fifoDataValid	slv ( NUM_CHANNELS_G- 1 downto 0 )
fifoDataRdEn	slv ( NUM_CHANNELS_G- 1 downto 0 )
debugDataValid	slv ( NUM_CHANNELS_G- 1 downto 0 )
debugData	slv16Array ( NUM_CHANNELS_G- 1 downto 0 )
frameDelay	slv ( 8 downto 0 )
frameDelaySet	sl
dataDelaySet	slv ( NUM_CHANNELS_G- 1 downto 0 )
dataDelay	slv9Array ( NUM_CHANNELS_G- 1 downto 0 )

Attributes
keep	string

Instantiations
synchronizeroneshotcnt_1	SynchronizerOneShotCnt <Entity SynchronizerOneShotCnt>
synchronizer_1	Synchronizer <Entity Synchronizer>
synchronizervec_1	SynchronizerVector <Entity SynchronizerVector>
synchronizer_2	Synchronizer <Entity Synchronizer>
adcclk_i_ibufds	ibufds
u_bufio	bufio
u_adcbitclkr	bufr
adc_bitclk_rst_sync	RstSync <Entity RstSync>
u_framein	ibufds
u_frame_deserializer	Ad9249Deserializer <Entity Ad9249Deserializer>
u_datain	ibufds
u_data_deserializer	Ad9249Deserializer <Entity Ad9249Deserializer>
u_datafifo	SynchronizerFifo <Entity SynchronizerFifo>
u_datafifodebug	SynchronizerFifo <Entity SynchronizerFifo>
synchronizeroneshotcnt_1	SynchronizerOneShotCnt <Entity SynchronizerOneShotCnt>
synchronizer_1	Synchronizer <Entity Synchronizer>
synchronizervec_1	SynchronizerVector <Entity SynchronizerVector>
synchronizer_2	Synchronizer <Entity Synchronizer>
adcclk_i_ibufds	ibufds
u_iserdesclockgen	ClockManagerUltraScale <Entity ClockManagerUltraScale>
u_frame_deserializer	Ad9249Deserializer <Entity Ad9249Deserializer>
u_frmdlyfifo	SynchronizerFifo <Entity SynchronizerFifo>
u_data_deserializer	Ad9249Deserializer <Entity Ad9249Deserializer>
u_datadlyfifo	SynchronizerFifo <Entity SynchronizerFifo>
rstsync_1	RstSync <Entity RstSync>
u_datafifo	SynchronizerFifo <Entity SynchronizerFifo>
u_datafifodebug	SynchronizerFifo <Entity SynchronizerFifo>

The documentation for this design unit was generated from the following files:

Processes

Constants