Architecture >> RawEthFramerTb::testbed

Processes
PROCESS_224	( clk )

Constants
CLK_PERIOD_C	time := 6 . 4 ns
TPD_G	time := ( CLK_PERIOD_C/ 4 )
BYPASS_UDP_C	boolean := true
BYPASS_RSSI_C	boolean := false
BYPASS_CHUNKER_C	boolean := false
PKT_LEN_C	slv ( 31 downto 0 ) := X " 000000AB "
PRBS_SEED_SIZE_C	positive := 128
CLIENT_WINDOW_ADDR_SIZE_C	positive := 1
CLIENT_MAX_NUM_OUTS_SEG_C	positive := ( 2 CLIENT_WINDOW_ADDR_SIZE_C )**
SERVER_WINDOW_ADDR_SIZE_C	positive := CLIENT_WINDOW_ADDR_SIZE_C
SERVER_MAX_NUM_OUTS_SEG_C	positive := ( 2 CLIENT_WINDOW_ADDR_SIZE_C )**
MAC_ADDR_C	Slv48Array ( 2 downto 0 ) := ( 0 = > x " 010300564400 " , 1 = > x " 020300564400 " , 2 = > x " 030300564400 " )
IP_ADDR_C	Slv32Array ( 2 downto 0 ) := ( 0 = > x " 0A02A8C0 " , 1 = > x " 0B02A8C0 " , 2 = > x " 0C02A8C0 " )
AXIS_CONFIG_C	AxiStreamConfigArray ( 3 downto 0 ) := ( others = > EMAC_AXIS_CONFIG_C )

Signals
clk	sl
rst	sl
rxMasters	AxiStreamMasterArray ( 1 downto 0 )
rxSlaves	AxiStreamSlaveArray ( 1 downto 0 )
txMasters	AxiStreamMasterArray ( 1 downto 0 )
txSlaves	AxiStreamSlaveArray ( 1 downto 0 )
ibServerMaster	AxiStreamMasterType
ibServerSlave	AxiStreamSlaveType
obServerMaster	AxiStreamMasterType
obServerSlave	AxiStreamSlaveType
ibClientMaster	AxiStreamMasterType
ibClientSlave	AxiStreamSlaveType
obClientMaster	AxiStreamMasterType
obClientSlave	AxiStreamSlaveType
ibServerMasters	AxiStreamMasterArray ( 1 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
ibServerSlaves	AxiStreamSlaveArray ( 1 downto 0 ) := ( others = > AXI_STREAM_SLAVE_FORCE_C )
obServerMasters	AxiStreamMasterArray ( 1 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
obServerSlaves	AxiStreamSlaveArray ( 1 downto 0 ) := ( others = > AXI_STREAM_SLAVE_FORCE_C )
ibClientMasters	AxiStreamMasterArray ( 1 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
ibClientSlaves	AxiStreamSlaveArray ( 1 downto 0 ) := ( others = > AXI_STREAM_SLAVE_FORCE_C )
obClientMasters	AxiStreamMasterArray ( 1 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
obClientSlaves	AxiStreamSlaveArray ( 1 downto 0 ) := ( others = > AXI_STREAM_SLAVE_FORCE_C )
errorDet	slv ( 0 downto 0 )
start	sl
stop	sl
cnt	Slv ( 31 downto 0 )
tdc	Slv ( 31 downto 0 )
trig	slv ( 1 downto 0 )
frameRate	Slv32Array ( 1 downto 0 )
errorDetCnt	SlVectorArray ( 0 downto 0 , 31 downto 0 )

Instantiations
clkrst_inst	ClkRst <Entity ClkRst>
u_server	UdpEngineWrapper <Entity UdpEngineWrapper>
u_client	UdpEngineWrapper <Entity UdpEngineWrapper>
u_server	RawEthFramer <Entity RawEthFramer>
u_client	RawEthFramer <Entity RawEthFramer>
u_rssiserver	RssiCoreWrapper <Entity RssiCoreWrapper>
u_rssiclient	RssiCoreWrapper <Entity RssiCoreWrapper>
u_tx_4369_tdest0	SsiPrbsTx <Entity SsiPrbsTx>
u_rx_8738_tdest0	SsiPrbsRx <Entity SsiPrbsRx>
u_trigrate	SyncTrigRate <Entity SyncTrigRate>
u_syncstatusvector	SyncStatusVector <Entity SyncStatusVector>

The documentation for this design unit was generated from the following file:

Processes

Constants