Architecture >> Pgp4FecTb::testbed

Constants
BYP_MODE_C	sl := ' 0 '
TPD_C	time := 1 ns
PGP_CLK_PERIOD_C	time := 4 ns
LOC_CLK_PERIOD_C	time := 4 ns
TX_PACKET_LENGTH_C	slv ( 31 downto 0 ) := toSlv ( 128 , 32 )
NUMBER_PACKET_C	slv ( 31 downto 0 ) := x " 000000FF "
PRBS_SEED_SIZE_C	*positive := 8 PGP4_AXIS_CONFIG_C.TDATA_BYTES_C**

Signals
pgpTxIn	Pgp4TxInType := PGP4_TX_IN_INIT_C
pgpTxOut	Pgp4TxOutType
pgpTxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
pgpTxSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
pgpRxIn	Pgp4RxInType := PGP4_RX_IN_INIT_C
pgpRxOut	Pgp4RxOutType
pgpRxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
pgpRxCtrl	AxiStreamCtrlType := AXI_STREAM_CTRL_INIT_C
rxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
rxSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
passed	sl := ' 0 '
failed	sl := ' 0 '
frameRxErr	sl := ' 0 '
updated	sl := ' 0 '
errorDet	sl := ' 0 '
cnt	slv ( 31 downto 0 ) := ( others = > ' 0 ' )
pgpClk	sl := ' 0 '
pgpRst	sl := ' 1 '
pgpRstL	sl := ' 0 '
locClk	sl := ' 0 '
locRst	sl := ' 1 '
txHeader	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
txData	slv ( 63 downto 0 ) := ( others = > ' 0 ' )
loopbackHeader	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
loopbackData	slv ( 63 downto 0 ) := ( others = > ' 0 ' )
rxValid	sl := ' 0 '
rxHeader	slv ( 1 downto 0 ) := ( others = > ' 0 ' )
rxData	slv ( 63 downto 0 ) := ( others = > ' 0 ' )
rxFecLock	sl := ' 0 '
rxFecCorInc	sl := ' 0 '
rxFecUnCorInc	sl := ' 0 '
rxFecInjErr	sl := ' 0 '
injErrCnt	slv ( 11 downto 0 ) := ( others = > ' 1 ' )

Instantiations
u_pgpclkrst	ClkRst <Entity ClkRst>
u_locclkrst	ClkRst <Entity ClkRst>
u_ssiprbstx	SsiPrbsTx <Entity SsiPrbsTx>
u_dut	Pgp4Core <Entity Pgp4Core>
u_fec	Pgp4GtyUsIpFecWrapper <Entity Pgp4GtyUsIpFecWrapper>
u_rx_fifo	PgpRxVcFifo <Entity PgpRxVcFifo>
u_ssiprbsrx	SsiPrbsRx <Entity SsiPrbsRx>
u_framerxerr	SynchronizerOneShot <Entity SynchronizerOneShot>

The documentation for this design unit was generated from the following file:

Processes

Constants