Architecture >> Pgp3AxiL::rtl
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U_RxErrorIrqEn | ( r ) |
PROCESS_135 | ( axilClk ) |
PROCESS_136 | ( axilReadMaster , axilRst , axilWriteMaster , r , rxStatusSync , txStatusSync ) |
U_RxErrorIrqEn | ( r ) |
PROCESS_345 | ( axilClk ) |
PROCESS_346 | ( axilReadMaster , axilRst , axilWriteMaster , r , rxStatusSync , txStatusSync ) |
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STATUS_OUT_TOP_C | integer := ite ( STATUS_CNT_WIDTH_G> 7 , 7 , STATUS_CNT_WIDTH_G- 1 ) |
RX_ERROR_COUNTERS_C | integer := 52 |
TX_ERROR_COUNTERS_C | integer := 36 |
RX_STATUS_COUNTERS_C | integer := 1 |
TX_STATUS_COUNTERS_C | integer := 1 |
REG_INIT_C | RegType := ( txDiffCtrl = > ( others = > ' 1 ' ) , txPreCursor = > " 00111 " , txPostCursor = > " 00111 " , countReset = > ' 0 ' , loopBack = > ( others = > ' 0 ' ) , flowCntlDis = > PGP3_TX_IN_INIT_C.flowCntlDis , txDisable = > PGP3_TX_IN_INIT_C.disable , skpInterval = > PGP3_TX_IN_INIT_C.skpInterval , autoStatus = > ' 0 ' , axilWriteSlave = > AXI_LITE_WRITE_SLAVE_INIT_C , axilReadSlave = > AXI_LITE_READ_SLAVE_INIT_C ) |
The documentation for this design unit was generated from the following files:
- build/SRC_VHDL/surf/Pgp3AxiL.vhd
- protocols/pgp/pgp3/core/rtl/Pgp3AxiL.vhd