EthMacPauseTb.testbed Architecture Reference

Architecture >> EthMacPauseTb::testbed

Processes
error_checking	( clk )
results	( clk )
PROCESS_221	( failed , passed )

Constants
CLK_PERIOD_C	time := 10 ns
TPD_C	time := CLK_PERIOD_C/ 4
TX_PACKET_LENGTH_C	slv ( 31 downto 0 ) := toSlv ( ( 8800 / 16 ) - 1 , 32 )
PRBS_SEED_SIZE_C	natural := 128
PRBS_TAPS_C	NaturalArray := ( 0 = > 31 , 1 = > 6 , 2 = > 2 , 3 = > 1 )
PRBS_FLOW_CTRL_C	boolean := true
CLT_MAC_C	slv ( 47 downto 0 ) := x " 000000560008 "
CLT_IP_C	slv ( 31 downto 0 ) := x " 0A02A8C0 "
CLT_PORT_C	positive := 8193
SRV_MAC_C	slv ( 47 downto 0 ) := x " 010000560008 "
SRV_IP_C	slv ( 31 downto 0 ) := x " 0B02A8C0 "
SRV_PORT_C	positive := 8192
SRV_PORT_SLV_C	slv ( 15 downto 0 ) := x " 0020 "

Signals
clk	sl := ' 0 '
trig	sl := ' 0 '
rst	sl := ' 1 '
txMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
txSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
obMacMasters	AxiStreamMasterArray ( 1 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
obMacSlaves	AxiStreamSlaveArray ( 1 downto 0 ) := ( others = > AXI_STREAM_SLAVE_INIT_C )
ibMacMasters	AxiStreamMasterArray ( 1 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
ibMacSlaves	AxiStreamSlaveArray ( 1 downto 0 ) := ( others = > AXI_STREAM_SLAVE_INIT_C )
xgmiiData	Slv64Array ( 1 downto 0 ) := ( others = > ( others = > ' 0 ' ) )
xgmiiChar	Slv8Array ( 1 downto 0 ) := ( others = > ( others = > ' 0 ' ) )
rxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
rxSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
prbsFlowCtrlMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
prbsFlowCtrlSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C
updated	sl := ' 0 '
errorDet	sl := ' 0 '
errLength	sl := ' 0 '
errDataBus	sl := ' 0 '
errEofe	sl := ' 0 '
errWordCnt	slv ( 31 downto 0 ) := ( others = > ' 0 ' )
packetLength	slv ( 31 downto 0 ) := ( others = > ' 0 ' )
cnt	slv ( 31 downto 0 ) := ( others = > ' 0 ' )
ethConfig	EthMacConfigArray ( 1 downto 0 ) := ( others = > ETH_MAC_CONFIG_INIT_C )
ethStatus	EthMacStatusArray ( 1 downto 0 )
failedVec	slv ( 15 downto 0 ) := ( others = > ' 0 ' )
passed	sl := ' 0 '
failed	sl := ' 0 '

Instantiations
u_clkrst	ClkRst <Entity ClkRst>
u_tx	SsiPrbsTx <Entity SsiPrbsTx>
u_cltudp	UdpEngineWrapper <Entity UdpEngineWrapper>
u_cltmac	EthMacTop <Entity EthMacTop>
u_srvmac	EthMacTop <Entity EthMacTop>
u_srvudp	UdpEngineWrapper <Entity UdpEngineWrapper>
u_rx	SsiPrbsRx <Entity SsiPrbsRx>
u_prbsflowctrl	AxiStreamPrbsFlowCtrl <Entity AxiStreamPrbsFlowCtrl>

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The documentation for this design unit was generated from the following file:

• ethernet/EthMacCore/tb/EthMacPauseTb.vhd