AxiLtc2270Deser.rtl Architecture Reference

Architecture >> AxiLtc2270Deser::rtl

Processes
PROCESS_192	( adcClock )

Signals
adcInClk	sl
adcClock	sl
dmux	slv ( 1 downto 0 )
adcDataPs	Slv8Array ( 0 to 1 )
adcDataNs	Slv8Array ( 0 to 1 )
adcDataP	Slv8Array ( 0 to 1 )
adcDataN	Slv8Array ( 0 to 1 )
adcDataNd	Slv8Array ( 0 to 1 )
adcDmuxA	Slv8Array ( 0 to 1 )
adcDmuxB	Slv8Array ( 0 to 1 )
data	Slv16Array ( 0 to 1 )

Attributes
IODELAY_GROUP	string
IODELAY_GROUP	label is IODELAY_GROUP_G

Instantiations
clkoutbufdiff_0	ClkOutBufDiff <Entity ClkOutBufDiff>
ibufds_or	ibufds
ibufgds_0	ibufgds
bufg_0	bufg
synchvector_inst	SynchronizerVector <Entity SynchronizerVector>
idelayctrl_inst	idelayctrl
axiltc2270deserbit_inst	AxiLtc2270DeserBit <Entity AxiLtc2270DeserBit>
syncfifo_inst	SynchronizerFifo <Entity SynchronizerFifo>

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The documentation for this design unit was generated from the following file:

• devices/Linear/lct2270/rtl/AxiLtc2270Deser.vhd