AxiAds42lb69Deser.rtl Architecture Reference

Architecture >> AxiAds42lb69Deser::rtl

Processes
PROCESS_200	( adcClock )

Signals
adcClock	sl
dmux	slv ( 1 downto 0 )
adcDataPs	Slv8Array ( 1 downto 0 )
adcDataNs	Slv8Array ( 1 downto 0 )
adcDataP	Slv8Array ( 1 downto 0 )
adcDataN	Slv8Array ( 1 downto 0 )
adcDataNd	Slv8Array ( 1 downto 0 )
adcDmuxA	Slv8Array ( 1 downto 0 )
adcDmuxB	Slv8Array ( 1 downto 0 )
data	Slv16Array ( 1 downto 0 )

Attributes
IODELAY_GROUP	string
IODELAY_GROUP	label is IODELAY_GROUP_G

Instantiations
axiads42lb69pll_inst	AxiAds42lb69Pll <Entity AxiAds42lb69Pll>
synchvector_inst	SynchronizerVector <Entity SynchronizerVector>
idelayctrl_inst	idelayctrl
axiads42lb69deserbit_inst	AxiAds42lb69DeserBit <Entity AxiAds42lb69DeserBit>
syncfifo_inst	SynchronizerFifo <Entity SynchronizerFifo>

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The documentation for this design unit was generated from the following file:

• devices/Ti/ads42lb69/rtl/AxiAds42lb69Deser.vhd