PgpParallelSimModel.mapping Architecture Reference

Architecture >> PgpParallelSimModel::mapping

Constants
SPEED_OF_LIGHT_C	real := 299792458 . 0
SPEED_OF_FIBER_C	real := SPEED_OF_LIGHT_C/ INDEX_OF_REFRACTION_G
CLK_PER_METER_C	real := CLK_FREQ_G/ SPEED_OF_FIBER_C
CABLE_DELAY_FLOAT_C	real := CABLE_LENGTH_G* CLK_PER_METER_C
CABLE_DELAY_C	natural := getTimeRatio ( CABLE_DELAY_FLOAT_C , 1 . 0 )
WIDTH_C	natural := 20

Signals
phyTxReady	sl
phyRxReady	sl
pgpInDly	slv ( 19 downto 0 )
dataIn	slv ( 19 downto 0 )
dataOut	slv ( 19 downto 0 )
phyTxLanesOut	Pgp2bTxPhyLaneOutArray ( 0 to 0 )
phyRxLanesIn	Pgp2bRxPhyLaneInArray ( 0 to 0 )

Instantiations
u_cabledelay	SlvDelay <Entity SlvDelay>
u_rxserdelay	SlvDelay <Entity SlvDelay>
u_decoder8b10b	Decoder8b10b <Entity Decoder8b10b>
u_pgp2blane	Pgp2bLane <Entity Pgp2bLane>
u_encoder8b10b	Encoder8b10b <Entity Encoder8b10b>
u_txserdelay	SlvDelay <Entity SlvDelay>

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The documentation for this design unit was generated from the following file:

• protocols/pgp/pgp2b/core/tb/PgpParallelSimModel.vhd