Pgp4TxLiteTb.testbed Architecture Reference

Architecture >> Pgp4TxLiteTb::testbed

Processes
PROCESS_143	( pgpClk )
PROCESS_144	( failed , passed )
PROCESS_354	( pgpClk )
PROCESS_355	( failed , passed )

Constants
TPD_C	time := 1 ns
PGP_CLK_PERIOD_C	time := 7 ns
LOC_CLK_PERIOD_C	time := 11 ns
TX_PACKET_LENGTH_C	slv ( 31 downto 0 ) := toSlv ( 256 , 32 )
NUMBER_PACKET_C	slv ( 31 downto 0 ) := x " 000000FF "
PRBS_SEED_SIZE_C	positive := 8 * PGP4_AXIS_CONFIG_C.TDATA_BYTES_C

Signals
pgpTxIn	Pgp4TxInType := ( disable = > ' 0 ' , flowCntlDis = > ' 1 ' , resetTx = > ' 0 ' , skpInterval = > ( others = > ' 0 ' ) , opCodeEn = > ' 0 ' , opCodeData = > ( others = > ' 0 ' ) , locData = > ( others = > ' 0 ' ) )
pgpRxOut	Pgp4RxOutType
pgpTxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
pgpTxSlave	AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
phyData	slv ( 63 downto 0 )
phyHeader	slv ( 1 downto 0 )
pgpRxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
passed	sl := ' 0 '
failed	sl := ' 0 '
updated	sl := ' 0 '
errorDet	sl := ' 0 '
cnt	slv ( 31 downto 0 )
pgpClk	sl := ' 0 '
pgpRst	sl := ' 1 '
locClk	sl := ' 0 '
locRst	sl := ' 1 '

Instantiations
u_pgpclkrst	ClkRst <Entity ClkRst>
u_locclkrst	ClkRst <Entity ClkRst>
u_ssiprbstx	SsiPrbsTx <Entity SsiPrbsTx>
u_pgp4txlite	Pgp4TxLite <Entity Pgp4TxLite>
u_pgp4rx	Pgp4Rx <Entity Pgp4Rx>
u_ssiprbsrx	SsiPrbsRx <Entity SsiPrbsRx>
u_pgpclkrst	ClkRst <Entity ClkRst>
u_locclkrst	ClkRst <Entity ClkRst>
u_ssiprbstx	SsiPrbsTx <Entity SsiPrbsTx>
u_pgp4txlite	Pgp4TxLite <Entity Pgp4TxLite>
u_pgp4rx	Pgp4Rx <Entity Pgp4Rx>
u_ssiprbsrx	SsiPrbsRx <Entity SsiPrbsRx>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Pgp4TxLiteTb.vhd
• protocols/pgp/pgp4/core/tb/Pgp4TxLiteTb.vhd