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Pgp2fcLaneWrapper.rtl Architecture Reference
Architecture >> Pgp2fcLaneWrapper::rtl

Constants

TUSER_WIDTH_C  positive := 2
TDEST_WIDTH_C  positive := 4
TDATA_NUM_BYTES_C  positive := 2

Signals

axisClk  sl := ' 0 '
axisRst  sl := ' 0 '
sAxisMaster  AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
sAxisSlave  AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C
pgpTxMaster  AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
pgpTxSlave  AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C
pgpTxMasters  AxiStreamMasterArray ( 3 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
pgpTxSlaves  AxiStreamSlaveArray ( 3 downto 0 ) := ( others = > AXI_STREAM_SLAVE_FORCE_C )
pgpTxIn  Pgp2fcTxInType := PGP2FC_TX_IN_INIT_C
pgpTxOut  Pgp2fcTxOutType := PGP2FC_TX_OUT_INIT_C
phyTxLaneOut  Pgp2fcTxPhyLaneOutType := PGP2FC_TX_PHY_LANE_OUT_INIT_C
pgpRxIn  Pgp2fcRxInType := PGP2FC_RX_IN_INIT_C
pgpRxOut  Pgp2fcRxOutType := PGP2FC_RX_OUT_INIT_C
pgpRxMasters  AxiStreamMasterArray ( 3 downto 0 ) := ( others = > AXI_STREAM_MASTER_INIT_C )
pgpRxCtrl  AxiStreamCtrlArray ( 3 downto 0 ) := ( others = > AXI_STREAM_CTRL_UNUSED_C )
phyRxLaneIn  Pgp2fcRxPhyLaneInType := PGP2FC_RX_PHY_LANE_IN_INIT_C
phyRxInit  sl := ' 0 '
mAxisMaster  AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
mAxisSlave  AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C

Instantiations

u_shimlayerslave  SlaveAxiStreamIpIntegrator <Entity SlaveAxiStreamIpIntegrator>
u_insertsof  SsiInsertSof <Entity SsiInsertSof>
u_dut  Pgp2fcLane <Entity Pgp2fcLane>
u_rxfifo  AxiStreamFifoV2 <Entity AxiStreamFifoV2>
u_shimlayermaster  MasterAxiStreamIpIntegrator <Entity MasterAxiStreamIpIntegrator>

The documentation for this design unit was generated from the following file: