Architecture >> HtspCaui4Gty::mapping

Processes
PROCESS_249	( phyClk )

Constants
RX_POLARITY_C	slv ( 9 downto 0 ) := ( " 000000 " & RX_POLARITY_G )
TX_POLARITY_C	slv ( 9 downto 0 ) := ( " 000000 " & TX_POLARITY_G )
TX_DIFF_CTRL_C	Slv5Array ( 9 downto 0 ) := ( 0 = > TX_DIFF_CTRL_G ( 0 ) , 1 = > TX_DIFF_CTRL_G ( 1 ) , 2 = > TX_DIFF_CTRL_G ( 2 ) , 3 = > TX_DIFF_CTRL_G ( 3 ) , 4 = > " 11111 " , 5 = > " 11111 " , 6 = > " 11111 " , 7 = > " 11111 " , 8 = > " 11111 " , 9 = > " 11111 " )
TX_PRE_CURSOR_C	Slv5Array ( 9 downto 0 ) := ( 0 = > TX_PRE_CURSOR_G ( 0 ) , 1 = > TX_PRE_CURSOR_G ( 1 ) , 2 = > TX_PRE_CURSOR_G ( 2 ) , 3 = > TX_PRE_CURSOR_G ( 3 ) , 4 = > " 11111 " , 5 = > " 11111 " , 6 = > " 11111 " , 7 = > " 11111 " , 8 = > " 11111 " , 9 = > " 11111 " )
TX_POST_CURSOR_C	Slv5Array ( 9 downto 0 ) := ( 0 = > TX_POST_CURSOR_G ( 0 ) , 1 = > TX_POST_CURSOR_G ( 1 ) , 2 = > TX_POST_CURSOR_G ( 2 ) , 3 = > TX_POST_CURSOR_G ( 3 ) , 4 = > " 11111 " , 5 = > " 11111 " , 6 = > " 11111 " , 7 = > " 11111 " , 8 = > " 11111 " , 9 = > " 11111 " )

Signals
phyClk	sl
phyRst	sl
phyUsrRst	sl
htspRefClk	sl
phyRxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
phyRxMasterReg0	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
phyRxMasterReg1	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
phyTxMaster	AxiStreamMasterType
phyTxSlave	AxiStreamSlaveType
loopback	slv ( 2 downto 0 )
rxPolarity	slv ( 9 downto 0 )
txPolarity	slv ( 9 downto 0 )
txDiffCtrl	Slv5Array ( 9 downto 0 )
txPreCursor	Slv5Array ( 9 downto 0 )
txPostCursor	Slv5Array ( 9 downto 0 )
stableReset	sl
phyReady	sl

Instantiations
u_htsprst	RstPipeline <Entity RstPipeline>
u_core	HtspCore <Entity HtspCore>
u_ip	Caui4GtyIpWrapper <Entity Caui4GtyIpWrapper>
u_rogue	RogueHtspSim <Entity RogueHtspSim>
u_htsprefclk	ibufds_gte4

The documentation for this design unit was generated from the following file:

Processes

Constants