Architecture >> CoaXPressRx::mapping

Constants
NARROW_AXIS_CONFIG_C	AxiStreamConfigType := ( TSTRB_EN_C = > false , TDATA_BYTES_C = > 4 , TDEST_BITS_C = > 0 , TID_BITS_C = > 0 , TKEEP_MODE_C = > TKEEP_NORMAL_C , TUSER_BITS_C = > 1 , TUSER_MODE_C = > TUSER_NORMAL_C )
WIDE_AXIS_CONFIG_C	AxiStreamConfigType := ( TSTRB_EN_C = > NARROW_AXIS_CONFIG_C.TSTRB_EN_C , TDATA_BYTES_C = > 4 * NUM_LANES_G , TDEST_BITS_C = > NARROW_AXIS_CONFIG_C.TDEST_BITS_C , TID_BITS_C = > NARROW_AXIS_CONFIG_C.TID_BITS_C , TKEEP_MODE_C = > NARROW_AXIS_CONFIG_C.TKEEP_MODE_C , TUSER_BITS_C = > NARROW_AXIS_CONFIG_C.TUSER_BITS_C , TUSER_MODE_C = > NARROW_AXIS_CONFIG_C.TUSER_MODE_C )

Signals
ioAck	slv ( NUM_LANES_G- 1 downto 0 )
eventAckVec	slv ( NUM_LANES_G- 1 downto 0 )
eventTagVec	Slv8Array ( NUM_LANES_G- 1 downto 0 )
cfgMasters	AxiStreamMasterArray ( NUM_LANES_G- 1 downto 0 )
dataMasters	AxiStreamMasterArray ( NUM_LANES_G- 1 downto 0 )
dataCtrls	AxiStreamCtrlArray ( NUM_LANES_G- 1 downto 0 )
rxMasters	AxiStreamMasterArray ( NUM_LANES_G- 1 downto 0 )
rxSlaves	AxiStreamSlaveArray ( NUM_LANES_G- 1 downto 0 )
rxMaster	AxiStreamMasterType
rxSlave	AxiStreamSlaveType
rxCtrl	AxiStreamCtrlType
fsmMaster	AxiStreamMasterType
hdrMaster	AxiStreamMasterType
hdrCtrl	AxiStreamCtrlType
dataIntMaster	AxiStreamMasterType
dataIntSlave	AxiStreamSlaveType
overflowData	slv ( NUM_LANES_G- 1 downto 0 )

Instantiations
u_lane	CoaXPressRxLane <Entity CoaXPressRxLane>
u_data	AxiStreamFifoV2 <Entity AxiStreamFifoV2>
u_mux	CoaXPressRxLaneMux <Entity CoaXPressRxLaneMux>
u_fsm	CoaXPressRxHsFsm <Entity CoaXPressRxHsFsm>
u_hdr	AxiStreamFifoV2 <Entity AxiStreamFifoV2>
u_datafifo	AxiStreamFifoV2 <Entity AxiStreamFifoV2>
u_datasof	SsiInsertSof <Entity SsiInsertSof>
u_config	AxiStreamFifoV2 <Entity AxiStreamFifoV2>
u_trigack	SynchronizerOneShot <Entity SynchronizerOneShot>
u_eventack	SynchronizerFifo <Entity SynchronizerFifo>

The documentation for this design unit was generated from the following file:

Constants

Signals