Architecture >> AxiLtc2270Reg::rtl

Processes
comb	( axiReadMaster , axiRst , axiWriteMaster , r , regIn , sdo )
seq	( axiClk )

Constants
HALF_SCLK_C	natural := getTimeRatio ( AXI_CLK_FREQ_G , 8 . 0E + 06 )
TIMEOUT_1S_C	natural := getTimeRatio ( AXI_CLK_FREQ_G , 1 . 0E + 00 )
REG_INIT_C	RegType := ( ' 0 ' , ' 0 ' , ' 1 ' , ' 1 ' , ' 1 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , 0 , 0 , ( others = > ( others = > ' 0 ' ) ) , ( others = > ' 0 ' ) , ( others = > ( others = > ( others = > ' 0 ' ) ) ) , AXI_LTC2270_CONFIG_INIT_C , IDLE_S , AXI_LITE_READ_SLAVE_INIT_C , AXI_LITE_WRITE_SLAVE_INIT_C )

Types
StateType	( IDLE_S , SCK_LOW_S , SCK_HIGH_S )

Signals
r	RegType := REG_INIT_C
rin	RegType
regIn	AxiLtc2270StatusType := AXI_LTC2270_STATUS_INIT_C
regOut	AxiLtc2270ConfigType := AXI_LTC2270_CONFIG_INIT_C
cntRst	sl
sdo	sl

Records
RegType

Instantiations
iobuf_inst	IoBufWrapper <Entity IoBufWrapper>
syncout_delayin_data	SynchronizerFifo <Entity SynchronizerFifo>
syncout_delayin_load	RstSync <Entity RstSync>
syncout_delayin_rst	RstSync <Entity RstSync>
syncin_delayout_rdy	Synchronizer <Entity Synchronizer>
syncin_delayout_data	SynchronizerFifo <Entity SynchronizerFifo>

The documentation for this design unit was generated from the following file:

Processes

Constants