AxiAds42lb69Core.mapping Architecture Reference

Architecture >> AxiAds42lb69Core::mapping

Processes
PROCESS_199	( adcClk )

Signals
status	AxiAds42lb69StatusType
config	AxiAds42lb69ConfigType
adcDataCnv	Slv16Array ( 1 downto 0 )
convert	slv ( 1 downto 0 )
invert	slv ( 1 downto 0 )

Instantiations
synchvector0_inst	SynchronizerVector <Entity SynchronizerVector>
synchvector1_inst	SynchronizerVector <Entity SynchronizerVector>
axiads42lb69reg_inst	AxiAds42lb69Reg <Entity AxiAds42lb69Reg>
axiads42lb69deser_inst	AxiAds42lb69Deser <Entity AxiAds42lb69Deser>

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The documentation for this design unit was generated from the following file:

• devices/Ti/ads42lb69/rtl/AxiAds42lb69Core.vhd