Pgp4RxProtocol.rtl Architecture Reference

Architecture >> Pgp4RxProtocol::rtl

Processes
comb	( linkError , pgpRxIn , pgpRxRst , phyRxActiveSync , phyRxActiveSyncFall , protRxData , protRxHeader , protRxValid , r )
seq	( pgpRxClk , pgpRxRst )
comb	( linkError , pgpRxIn , pgpRxRst , phyRxActiveSync , phyRxActiveSyncFall , protRxData , protRxHeader , protRxValid , r )
seq	( pgpRxClk , pgpRxRst )

Constants
REG_INIT_C	RegType := ( notValidCnt = > ( others = > ' 0 ' ) , count = > ( others = > ' 0 ' ) , pgpRxMaster = > axiStreamMasterInit ( PGP4_AXIS_CONFIG_C ) , pgpRxOut = > PGP4_RX_OUT_INIT_C , protRxPhyInit = > ' 1 ' , remRxFifoCtrl = > ( others = > AXI_STREAM_CTRL_INIT_C ) , remRxLinkReady = > ' 0 ' , locRxLinkReady = > ' 0 ' , version = > ( others = > ' 0 ' ) )

Signals
r	RegType := REG_INIT_C
rin	RegType
phyRxActiveSyncFall	sl
phyRxActiveSync	sl

Records
RegType

Instantiations
u_phyrxactivesync	SynchronizerEdge <Entity SynchronizerEdge>
u_phyrxactivesync	SynchronizerEdge <Entity SynchronizerEdge>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Pgp4RxProtocol.vhd
• protocols/pgp/pgp4/core/rtl/Pgp4RxProtocol.vhd