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Pgp3GtyUsWrapper.rtl Architecture Reference
Architecture >> Pgp3GtyUsWrapper::rtl

Constants

NUM_AXIL_MASTERS_C  integer := NUM_LANES_G+ 1
QPLL_AXIL_INDEX_C  integer := NUM_AXIL_MASTERS_C- 1
XBAR_CONFIG_C  AxiLiteCrossbarMasterConfigArray ( NUM_AXIL_MASTERS_C- 1 downto 0 ) := genAxiLiteConfig ( NUM_AXIL_MASTERS_C , AXIL_BASE_ADDR_G , 16 , 13 )

Signals

qpllLock  Slv2Array ( 3 downto 0 ) := ( others = > " 00 " )
qpllClk  Slv2Array ( 3 downto 0 ) := ( others = > " 00 " )
qpllRefclk  Slv2Array ( 3 downto 0 ) := ( others = > " 00 " )
qpllRst  Slv2Array ( 3 downto 0 ) := ( others = > " 00 " )
pgpRefClkDiv2  sl
pgpRefClk  sl
axilReadMasters  AxiLiteReadMasterArray ( NUM_AXIL_MASTERS_C- 1 downto 0 ) := ( others = > AXI_LITE_READ_MASTER_INIT_C )
axilReadSlaves  AxiLiteReadSlaveArray ( NUM_AXIL_MASTERS_C- 1 downto 0 ) := ( others = > AXI_LITE_READ_SLAVE_EMPTY_DECERR_C )
axilWriteMasters  AxiLiteWriteMasterArray ( NUM_AXIL_MASTERS_C- 1 downto 0 ) := ( others = > AXI_LITE_WRITE_MASTER_INIT_C )
axilWriteSlaves  AxiLiteWriteSlaveArray ( NUM_AXIL_MASTERS_C- 1 downto 0 ) := ( others = > AXI_LITE_WRITE_SLAVE_EMPTY_DECERR_C )

Instantiations

u_bufg_gt  bufg_gt
u_pgprefclk  ibufds_gte4
u_xbar  AxiLiteCrossbar <Entity AxiLiteCrossbar>
u_qpll  Pgp3GtyUsQpll <Entity Pgp3GtyUsQpll>
u_pgp  Pgp3GtyUs <Entity Pgp3GtyUs>
u_rogue  RoguePgp3Sim <Entity RoguePgp3Sim>

The documentation for this design unit was generated from the following file: