Pgp3GtyUsIpWrapper.mapping Architecture Reference

Architecture >> Pgp3GtyUsIpWrapper::mapping

Components
Pgp3GtyUsIp15G
Pgp3GtyUsIp12G
Pgp3GtyUsIp10G
Pgp3GtyUsIp6G
Pgp3GtyUsIp3G

Signals
dummy1	sl
dummy2	sl
dummy3	slv ( 3 downto 0 )
dummy4	sl
dummy5	sl
dummy6	sl
dummy7	sl
dummy8	sl
dummy9	sl
dummy10	sl
dummy11	sl
zeroBit	sl
txsequence_in	slv ( 6 downto 0 )
txheader_in	slv ( 5 downto 0 )
rxUsrClk2Int	sl
rxUsrClkActiveInt	sl
txUsrClk2Int	sl
txUsrClkActiveInt	sl
drpAddr	slv ( 9 downto 0 ) := ( others = > ' 0 ' )
drpDi	slv ( 15 downto 0 ) := ( others = > ' 0 ' )
drpDo	slv ( 15 downto 0 ) := ( others = > ' 0 ' )
drpEn	sl := ' 0 '
drpWe	sl := ' 0 '
drpRdy	sl := ' 0 '

Instantiations
u_rstsync_tx	RstSync <Entity RstSync>
u_rstsync_rx	RstSync <Entity RstSync>
u_pgp3gtyusip	pgp3gtyusip15g
u_pgp3gtyusip	pgp3gtyusip12g
u_pgp3gtyusip	pgp3gtyusip10g
u_pgp3gtyusip	pgp3gtyusip6g
u_pgp3gtyusip	pgp3gtyusip3g
u_axilitetodrp_1	AxiLiteToDrp <Entity AxiLiteToDrp>

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The documentation for this design unit was generated from the following file:

• protocols/pgp/pgp3/gtyUs+/rtl/Pgp3GtyUsIpWrapper.vhd