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Jesd204bTxWrapper.rtl Architecture Reference
Architecture >> Jesd204bTxWrapper::rtl

Signals

s_axilReadMaster  AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
s_axilReadSlave  AxiLiteReadSlaveType := AXI_LITE_READ_SLAVE_INIT_C
s_axilWriteMaster  AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
s_axilWriteSlave  AxiLiteWriteSlaveType := AXI_LITE_WRITE_SLAVE_INIT_C
s_nSyncArr  slv ( L_G- 1 downto 0 )
s_extData  sampleDataArray ( L_G- 1 downto 0 )
s_gtTxReady  slv ( L_G- 1 downto 0 )
s_gtTxArr  jesdGtTxLaneTypeArray ( L_G- 1 downto 0 )
s_txDiffCtrl  Slv8Array ( L_G- 1 downto 0 )
s_txPolarity  slv ( L_G- 1 downto 0 )
s_loopback  slv ( L_G- 1 downto 0 )
s_dacReady  slv ( L_G- 1 downto 0 )

Instantiations

u_axil  SlaveAxiLiteIpIntegrator <Entity SlaveAxiLiteIpIntegrator>
u_dut  Jesd204bTx <Entity Jesd204bTx>

The documentation for this design unit was generated from the following file: