GtRxAlignCheckWrapper.rtl Architecture Reference

Architecture >> GtRxAlignCheckWrapper::rtl

Constants
DRP_ADDR_C	slv ( 31 downto 0 ) := toSlv ( DRP_ADDR_INT_G , 32 )

Signals
axilAResetN	sl := ' 1 '
sAxilReadMaster	AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
sAxilReadSlave	AxiLiteReadSlaveType := AXI_LITE_READ_SLAVE_INIT_C
sAxilWriteMaster	AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
sAxilWriteSlave	AxiLiteWriteSlaveType := AXI_LITE_WRITE_SLAVE_INIT_C
mAxilReadMaster	AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
mAxilReadSlave	AxiLiteReadSlaveType := AXI_LITE_READ_SLAVE_INIT_C
mAxilWriteMaster	AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
mAxilWriteSlave	AxiLiteWriteSlaveType := AXI_LITE_WRITE_SLAVE_INIT_C

Instantiations
u_slaveshim	SlaveAxiLiteIpIntegrator <Entity SlaveAxiLiteIpIntegrator>
u_mastershim	MasterAxiLiteIpIntegrator <Entity MasterAxiLiteIpIntegrator>
u_dut	GtRxAlignCheck <Entity GtRxAlignCheck>

---

The documentation for this design unit was generated from the following file:

• xilinx/general/wrappers/GtRxAlignCheckWrapper.vhd