GtRxAlignCheck Entity Reference

Inheritance diagram for GtRxAlignCheck:

Collaboration diagram for GtRxAlignCheck:

Entities
GtRxAlignCheck.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
AxiLitePkg	Package <AxiLitePkg>

Generics
TPD_G	time := 1 ns
SIMULATION_G	boolean := false
LOCK_VALUE_G	integer := 16
MASK_VALUE_G	integer := 126
GT_TYPE_G	string := " GTHE3 "
AXI_CLK_FREQ_G	real := 156 . 25E + 6
DRP_ADDR_G	slv ( 31 downto 0 )

Ports
txClk	in	sl
rxClk	in	sl
refClk	in	sl
resetIn	in	sl
resetOut	out	sl
resetDone	in	sl
resetErr	in	sl
locked	out	sl
axilClk	in	sl
axilRst	in	sl
mAxilReadMaster	out	AxiLiteReadMasterType
mAxilReadSlave	in	AxiLiteReadSlaveType
mAxilWriteMaster	out	AxiLiteWriteMasterType
mAxilWriteSlave	in	AxiLiteWriteSlaveType
sAxilReadMaster	in	AxiLiteReadMasterType
sAxilReadSlave	out	AxiLiteReadSlaveType
sAxilWriteMaster	in	AxiLiteWriteMasterType
sAxilWriteSlave	out	AxiLiteWriteSlaveType

---

The documentation for this design unit was generated from the following file:

• xilinx/general/rtl/GtRxAlignCheck.vhd