Architecture >> AxiStreamScatterGatherIpIntegrator::rtl
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SLAVE_AXIS_CONFIG_C | AxiStreamConfigType := ssiAxiStreamConfig ( dataBytes = > 2 , tDestBits = > 1 , tUserBits = > 2 , tIdBits = > 1 ) |
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MASTER_AXIS_CONFIG_C | AxiStreamConfigType := ssiAxiStreamConfig ( dataBytes = > 12 , tDestBits = > 1 , tUserBits = > 2 , tIdBits = > 1 ) |
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axiResetN | sl := ' 1 ' |
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axilReadMaster | AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C |
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axilReadSlave | AxiLiteReadSlaveType := AXI_LITE_READ_SLAVE_INIT_C |
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axilWriteMaster | AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C |
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axilWriteSlave | AxiLiteWriteSlaveType := AXI_LITE_WRITE_SLAVE_INIT_C |
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sAxisMaster | AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C |
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sAxisSlave | AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C |
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sAxisCtrl | AxiStreamCtrlType := AXI_STREAM_CTRL_UNUSED_C |
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mAxisMaster | AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C |
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mAxisSlave | AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C |
The documentation for this design unit was generated from the following file:
- axi/axi-stream/ip_integrator/AxiStreamScatterGatherIpIntegrator.vhd