SURF  1.0
mapping Architecture Reference

Signals

phyRxd  slv ( 63 downto 0 )
phyRxc  slv ( 7 downto 0 )
phyTxd  slv ( 63 downto 0 )
phyTxc  slv ( 7 downto 0 )
phyClock  sl
phyClkBuf  sl
phyReset  sl
config  XauiConfig
status  XauiStatus
macRxAxisMaster  AxiStreamMasterType
macRxAxisCtrl  AxiStreamCtrlType
macTxAxisMaster  AxiStreamMasterType
macTxAxisSlave  AxiStreamSlaveType

Instantiations

u_mac  EthMacTop <Entity EthMacTop>
u_xauigthultrascalecore  xauigthultrascale125mhz10gigecore
u_xauigthultrascalecore  xauigthultrascale156p25mhz10gigecore
u_xauigthultrascalecore  xauigthultrascale312p5mhz10gigecore
u_xauigthultrascalecore  xauigthultrascale125mhz20gigecore
u_xauigthultrascalecore  xauigthultrascale156p25mhz20gigecore
u_xauigthultrascalecore  xauigthultrascale312p5mhz20gigecore
rstsync_inst  RstSync <Entity RstSync>
u_xauireg  XauiReg <Entity XauiReg>

Detailed Description

Definition at line 79 of file XauiGthUltraScale.vhd.

Member Data Documentation

◆ phyRxd

phyRxd slv ( 63 downto 0 )
Signal

Definition at line 81 of file XauiGthUltraScale.vhd.

◆ phyRxc

phyRxc slv ( 7 downto 0 )
Signal

Definition at line 82 of file XauiGthUltraScale.vhd.

◆ phyTxd

phyTxd slv ( 63 downto 0 )
Signal

Definition at line 83 of file XauiGthUltraScale.vhd.

◆ phyTxc

phyTxc slv ( 7 downto 0 )
Signal

Definition at line 84 of file XauiGthUltraScale.vhd.

◆ phyClock

phyClock sl
Signal

Definition at line 86 of file XauiGthUltraScale.vhd.

◆ phyClkBuf

phyClkBuf sl
Signal

Definition at line 87 of file XauiGthUltraScale.vhd.

◆ phyReset

phyReset sl
Signal

Definition at line 88 of file XauiGthUltraScale.vhd.

◆ config

Definition at line 90 of file XauiGthUltraScale.vhd.

◆ status

Definition at line 91 of file XauiGthUltraScale.vhd.

◆ macRxAxisMaster

Definition at line 93 of file XauiGthUltraScale.vhd.

◆ macRxAxisCtrl

Definition at line 94 of file XauiGthUltraScale.vhd.

◆ macTxAxisMaster

Definition at line 95 of file XauiGthUltraScale.vhd.

◆ macTxAxisSlave

Definition at line 96 of file XauiGthUltraScale.vhd.

◆ u_mac

u_mac EthMacTop
Instantiation

Definition at line 130 of file XauiGthUltraScale.vhd.

◆ u_xauigthultrascalecore [1/6]

u_xauigthultrascalecore xauigthultrascale125mhz10gigecore
Instantiation

Definition at line 460 of file XauiGthUltraScale.vhd.

◆ u_xauigthultrascalecore [2/6]

u_xauigthultrascalecore xauigthultrascale156p25mhz10gigecore
Instantiation

Definition at line 460 of file XauiGthUltraScale.vhd.

◆ u_xauigthultrascalecore [3/6]

u_xauigthultrascalecore xauigthultrascale312p5mhz10gigecore
Instantiation

Definition at line 460 of file XauiGthUltraScale.vhd.

◆ u_xauigthultrascalecore [4/6]

u_xauigthultrascalecore xauigthultrascale125mhz20gigecore
Instantiation

Definition at line 790 of file XauiGthUltraScale.vhd.

◆ u_xauigthultrascalecore [5/6]

u_xauigthultrascalecore xauigthultrascale156p25mhz20gigecore
Instantiation

Definition at line 790 of file XauiGthUltraScale.vhd.

◆ u_xauigthultrascalecore [6/6]

u_xauigthultrascalecore xauigthultrascale312p5mhz20gigecore
Instantiation

Definition at line 790 of file XauiGthUltraScale.vhd.

◆ rstsync_inst

rstsync_inst RstSync
Instantiation

Definition at line 808 of file XauiGthUltraScale.vhd.

◆ u_xauireg

u_xauireg XauiReg
Instantiation

Definition at line 832 of file XauiGthUltraScale.vhd.


The documentation for this class was generated from the following file: