SURF  1.0
Generics | Ports | Libraries | Use Clauses
XauiReg Entity Reference
ethernet » XauiCore » core
+ Inheritance diagram for XauiReg:
+ Collaboration diagram for XauiReg:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>
XauiPkg  Package <XauiPkg>

Generics

TPD_G  time := 1 ns
EN_AXI_REG_G  boolean := false
AXI_ERROR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C

Ports

localMac   in slv ( 47 downto 0 ) := MAC_ADDR_INIT_C
axiClk   in sl
axiRst   in sl
axiReadMaster   in AxiLiteReadMasterType
axiReadSlave   out AxiLiteReadSlaveType
axiWriteMaster   in AxiLiteWriteMasterType
axiWriteSlave   out AxiLiteWriteSlaveType
phyClk   in sl
phyRst   in sl
config   out XauiConfig
status   in XauiStatus

Detailed Description

See also
entity

Definition at line 29 of file XauiReg.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 31 of file XauiReg.vhd.

◆ EN_AXI_REG_G

EN_AXI_REG_G boolean := false
Generic

Definition at line 32 of file XauiReg.vhd.

◆ AXI_ERROR_RESP_G

AXI_ERROR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
Generic

Definition at line 33 of file XauiReg.vhd.

◆ localMac

localMac in slv ( 47 downto 0 ) := MAC_ADDR_INIT_C
Port

Definition at line 36 of file XauiReg.vhd.

◆ axiClk

axiClk in sl
Port

Definition at line 38 of file XauiReg.vhd.

◆ axiRst

axiRst in sl
Port

Definition at line 39 of file XauiReg.vhd.

◆ axiReadMaster

axiReadMaster in AxiLiteReadMasterType
Port

Definition at line 40 of file XauiReg.vhd.

◆ axiReadSlave

axiReadSlave out AxiLiteReadSlaveType
Port

Definition at line 41 of file XauiReg.vhd.

◆ axiWriteMaster

axiWriteMaster in AxiLiteWriteMasterType
Port

Definition at line 42 of file XauiReg.vhd.

◆ axiWriteSlave

axiWriteSlave out AxiLiteWriteSlaveType
Port

Definition at line 43 of file XauiReg.vhd.

◆ phyClk

phyClk in sl
Port

Definition at line 45 of file XauiReg.vhd.

◆ phyRst

phyRst in sl
Port

Definition at line 46 of file XauiReg.vhd.

◆ config

config out XauiConfig
Port

Definition at line 47 of file XauiReg.vhd.

◆ status

status in XauiStatus
Port

Definition at line 48 of file XauiReg.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file XauiReg.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file XauiReg.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 20 of file XauiReg.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file XauiReg.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file XauiReg.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 24 of file XauiReg.vhd.

◆ XauiPkg

XauiPkg
Package

Definition at line 25 of file XauiReg.vhd.

The documentation for this class was generated from the following file: