SURF  1.0
mapping Architecture Reference

Constants

QPLL_REFCLK_SEL_C  bit_vector := ite ( USE_GTREFCLK_G , " 111 " , QPLL_REFCLK_SEL_G )

Signals

refClockDiv2  sl
refClock  sl
refClk  sl
phyClock  sl
phyReset  sl
pwrUpRst  sl
qpllReset  sl

Instantiations

pwruprst_inst  PwrUpRst <Entity PwrUpRst>
synchronizer_0  Synchronizer <Entity Synchronizer>
ibufds_gte2_inst  ibufds_gte2
clk156_bufg  bufg
gtx7quadpll_inst  Gtx7QuadPll <Entity Gtx7QuadPll>

Detailed Description

Definition at line 51 of file TenGigEthGtx7Clk.vhd.

Member Data Documentation

◆ QPLL_REFCLK_SEL_C

QPLL_REFCLK_SEL_C bit_vector := ite ( USE_GTREFCLK_G , " 111 " , QPLL_REFCLK_SEL_G )
Constant

Definition at line 53 of file TenGigEthGtx7Clk.vhd.

◆ refClockDiv2

refClockDiv2 sl
Signal

Definition at line 55 of file TenGigEthGtx7Clk.vhd.

◆ refClock

refClock sl
Signal

Definition at line 56 of file TenGigEthGtx7Clk.vhd.

◆ refClk

refClk sl
Signal

Definition at line 57 of file TenGigEthGtx7Clk.vhd.

◆ phyClock

phyClock sl
Signal

Definition at line 58 of file TenGigEthGtx7Clk.vhd.

◆ phyReset

phyReset sl
Signal

Definition at line 59 of file TenGigEthGtx7Clk.vhd.

◆ pwrUpRst

pwrUpRst sl
Signal

Definition at line 60 of file TenGigEthGtx7Clk.vhd.

◆ qpllReset

qpllReset sl
Signal

Definition at line 61 of file TenGigEthGtx7Clk.vhd.

◆ pwruprst_inst

pwruprst_inst PwrUpRst
Instantiation

Definition at line 78 of file TenGigEthGtx7Clk.vhd.

◆ synchronizer_0

synchronizer_0 Synchronizer
Instantiation

Definition at line 91 of file TenGigEthGtx7Clk.vhd.

◆ ibufds_gte2_inst

ibufds_gte2_inst ibufds_gte2
Instantiation

Definition at line 99 of file TenGigEthGtx7Clk.vhd.

◆ clk156_bufg

clk156_bufg bufg
Instantiation

Definition at line 106 of file TenGigEthGtx7Clk.vhd.

◆ gtx7quadpll_inst

gtx7quadpll_inst Gtx7QuadPll
Instantiation

Definition at line 126 of file TenGigEthGtx7Clk.vhd.


The documentation for this class was generated from the following file: