SURF  1.0
Signals | Instantiations
mapping Architecture Reference

Signals

mAxiReadMaster  AxiLiteReadMasterType
mAxiReadSlave  AxiLiteReadSlaveType
mAxiWriteMaster  AxiLiteWriteMasterType
mAxiWriteSlave  AxiLiteWriteSlaveType
phyRxd  slv ( 63 downto 0 )
phyRxc  slv ( 7 downto 0 )
phyTxd  slv ( 63 downto 0 )
phyTxc  slv ( 7 downto 0 )
areset  sl
txClk322  sl
txUsrClk  sl
txUsrClk2  sl
txUsrRdy  sl
drpReqGnt  sl
drpEn  sl
drpWe  sl
drpAddr  slv ( 15 downto 0 )
drpDi  slv ( 15 downto 0 )
drpRdy  sl
drpDo  slv ( 15 downto 0 )
configurationVector  slv ( 535 downto 0 ) := ( others = > ' 0 ' )
config  TenGigEthConfig
status  TenGigEthStatus
macRxAxisMaster  AxiStreamMasterType
macRxAxisCtrl  AxiStreamCtrlType
macTxAxisMaster  AxiStreamMasterType
macTxAxisSlave  AxiStreamSlaveType

Instantiations

u_axiliteasync  AxiLiteAsync <Entity AxiLiteAsync>
u_sync  SynchronizerVector <Entity SynchronizerVector>
u_mac  EthMacTop <Entity EthMacTop>
u_tengigethgth7core  tengigethgth7core
u_tengigethrst  TenGigEthRst <Entity TenGigEthRst>
u_tengigethreg  TenGigEthReg <Entity TenGigEthReg>

Detailed Description

Definition at line 75 of file TenGigEthGth7.vhd.

Member Data Documentation

◆ mAxiReadMaster

mAxiReadMaster AxiLiteReadMasterType
Signal

Definition at line 77 of file TenGigEthGth7.vhd.

◆ mAxiReadSlave

mAxiReadSlave AxiLiteReadSlaveType
Signal

Definition at line 78 of file TenGigEthGth7.vhd.

◆ mAxiWriteMaster

mAxiWriteMaster AxiLiteWriteMasterType
Signal

Definition at line 79 of file TenGigEthGth7.vhd.

◆ mAxiWriteSlave

mAxiWriteSlave AxiLiteWriteSlaveType
Signal

Definition at line 80 of file TenGigEthGth7.vhd.

◆ phyRxd

phyRxd slv ( 63 downto 0 )
Signal

Definition at line 82 of file TenGigEthGth7.vhd.

◆ phyRxc

phyRxc slv ( 7 downto 0 )
Signal

Definition at line 83 of file TenGigEthGth7.vhd.

◆ phyTxd

phyTxd slv ( 63 downto 0 )
Signal

Definition at line 84 of file TenGigEthGth7.vhd.

◆ phyTxc

phyTxc slv ( 7 downto 0 )
Signal

Definition at line 85 of file TenGigEthGth7.vhd.

◆ areset

areset sl
Signal

Definition at line 87 of file TenGigEthGth7.vhd.

◆ txClk322

txClk322 sl
Signal

Definition at line 88 of file TenGigEthGth7.vhd.

◆ txUsrClk

txUsrClk sl
Signal

Definition at line 89 of file TenGigEthGth7.vhd.

◆ txUsrClk2

txUsrClk2 sl
Signal

Definition at line 90 of file TenGigEthGth7.vhd.

◆ txUsrRdy

txUsrRdy sl
Signal

Definition at line 91 of file TenGigEthGth7.vhd.

◆ drpReqGnt

drpReqGnt sl
Signal

Definition at line 93 of file TenGigEthGth7.vhd.

◆ drpEn

drpEn sl
Signal

Definition at line 94 of file TenGigEthGth7.vhd.

◆ drpWe

drpWe sl
Signal

Definition at line 95 of file TenGigEthGth7.vhd.

◆ drpAddr

drpAddr slv ( 15 downto 0 )
Signal

Definition at line 96 of file TenGigEthGth7.vhd.

◆ drpDi

drpDi slv ( 15 downto 0 )
Signal

Definition at line 97 of file TenGigEthGth7.vhd.

◆ drpRdy

drpRdy sl
Signal

Definition at line 98 of file TenGigEthGth7.vhd.

◆ drpDo

drpDo slv ( 15 downto 0 )
Signal

Definition at line 99 of file TenGigEthGth7.vhd.

◆ configurationVector

configurationVector slv ( 535 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 101 of file TenGigEthGth7.vhd.

◆ config

config TenGigEthConfig
Signal

Definition at line 103 of file TenGigEthGth7.vhd.

◆ status

status TenGigEthStatus
Signal

Definition at line 104 of file TenGigEthGth7.vhd.

◆ macRxAxisMaster

macRxAxisMaster AxiStreamMasterType
Signal

Definition at line 106 of file TenGigEthGth7.vhd.

◆ macRxAxisCtrl

macRxAxisCtrl AxiStreamCtrlType
Signal

Definition at line 107 of file TenGigEthGth7.vhd.

◆ macTxAxisMaster

macTxAxisMaster AxiStreamMasterType
Signal

Definition at line 108 of file TenGigEthGth7.vhd.

◆ macTxAxisSlave

macTxAxisSlave AxiStreamSlaveType
Signal

Definition at line 109 of file TenGigEthGth7.vhd.

◆ u_axiliteasync

u_axiliteasync AxiLiteAsync
Instantiation

Definition at line 137 of file TenGigEthGth7.vhd.

◆ u_sync

u_sync SynchronizerVector
Instantiation

Definition at line 154 of file TenGigEthGth7.vhd.

◆ u_mac

u_mac EthMacTop
Instantiation

Definition at line 182 of file TenGigEthGth7.vhd.

◆ u_tengigethgth7core

u_tengigethgth7core tengigethgth7core
Instantiation

Definition at line 243 of file TenGigEthGth7.vhd.

◆ u_tengigethrst

u_tengigethrst TenGigEthRst
Instantiation

Definition at line 265 of file TenGigEthGth7.vhd.

◆ u_tengigethreg

u_tengigethreg TenGigEthReg
Instantiation

Definition at line 302 of file TenGigEthGth7.vhd.

The documentation for this class was generated from the following file: