SURF  1.0
Generics | Ports | Libraries | Use Clauses
TenGigEthRst Entity Reference
ethernet » TenGigEthCore » core
+ Inheritance diagram for TenGigEthRst:
+ Collaboration diagram for TenGigEthRst:

Entities

rtl  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
vcomponents 

Generics

TPD_G  time := 1 ns

Ports

extRst   in sl
gtPowerGood   in sl := ' 1 '
phyClk   in sl
phyRst   in sl
txClk322   in sl
txUsrClk   out sl
txUsrClk2   out sl
gtTxRst   out sl
gtRxRst   out sl
txUsrRdy   out sl
rstCntDone   out sl
qplllock   in sl
qpllRst   out sl

Detailed Description

See also
entity

Definition at line 30 of file TenGigEthRst.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 32 of file TenGigEthRst.vhd.

◆ extRst

extRst in sl
Port

Definition at line 35 of file TenGigEthRst.vhd.

◆ gtPowerGood

gtPowerGood in sl := ' 1 '
Port

Definition at line 36 of file TenGigEthRst.vhd.

◆ phyClk

phyClk in sl
Port

Definition at line 37 of file TenGigEthRst.vhd.

◆ phyRst

phyRst in sl
Port

Definition at line 38 of file TenGigEthRst.vhd.

◆ txClk322

txClk322 in sl
Port

Definition at line 39 of file TenGigEthRst.vhd.

◆ txUsrClk

txUsrClk out sl
Port

Definition at line 40 of file TenGigEthRst.vhd.

◆ txUsrClk2

txUsrClk2 out sl
Port

Definition at line 41 of file TenGigEthRst.vhd.

◆ gtTxRst

gtTxRst out sl
Port

Definition at line 42 of file TenGigEthRst.vhd.

◆ gtRxRst

gtRxRst out sl
Port

Definition at line 43 of file TenGigEthRst.vhd.

◆ txUsrRdy

txUsrRdy out sl
Port

Definition at line 44 of file TenGigEthRst.vhd.

◆ rstCntDone

rstCntDone out sl
Port

Definition at line 45 of file TenGigEthRst.vhd.

◆ qplllock

qplllock in sl
Port

Definition at line 47 of file TenGigEthRst.vhd.

◆ qpllRst

qpllRst out sl
Port

Definition at line 48 of file TenGigEthRst.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file TenGigEthRst.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file TenGigEthRst.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 20 of file TenGigEthRst.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file TenGigEthRst.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file TenGigEthRst.vhd.

◆ unisim

unisim
Library

Definition at line 25 of file TenGigEthRst.vhd.

◆ vcomponents

vcomponents
Package

Definition at line 26 of file TenGigEthRst.vhd.

The documentation for this class was generated from the following file: