SURF  1.0
Signals | Instantiations
mapping Architecture Reference

Signals

gtRefClk0  sl
gtRefClk1  sl
gtEastRefClk0  sl
gtEastRefClk1  sl
gtWestRefClk0  sl
gtWestRefClk1  sl
gtGRefClk0  sl
gtGRefClk1  sl
drpEn  sl
drpWe  sl
drpRdy  sl
drpAddr  slv ( 7 downto 0 )
drpDi  slv ( 15 downto 0 )
drpDo  slv ( 15 downto 0 )

Instantiations

gtpe2_common_0_i  gtpe2_common
u_axilitetodrp  AxiLiteToDrp <Entity AxiLiteToDrp>

Detailed Description

Definition at line 62 of file Gtp7QuadPll.vhd.

Member Data Documentation

◆ gtRefClk0

gtRefClk0 sl
Signal

Definition at line 64 of file Gtp7QuadPll.vhd.

◆ gtRefClk1

gtRefClk1 sl
Signal

Definition at line 65 of file Gtp7QuadPll.vhd.

◆ gtEastRefClk0

gtEastRefClk0 sl
Signal

Definition at line 66 of file Gtp7QuadPll.vhd.

◆ gtEastRefClk1

gtEastRefClk1 sl
Signal

Definition at line 67 of file Gtp7QuadPll.vhd.

◆ gtWestRefClk0

gtWestRefClk0 sl
Signal

Definition at line 68 of file Gtp7QuadPll.vhd.

◆ gtWestRefClk1

gtWestRefClk1 sl
Signal

Definition at line 69 of file Gtp7QuadPll.vhd.

◆ gtGRefClk0

gtGRefClk0 sl
Signal

Definition at line 70 of file Gtp7QuadPll.vhd.

◆ gtGRefClk1

gtGRefClk1 sl
Signal

Definition at line 71 of file Gtp7QuadPll.vhd.

◆ drpEn

drpEn sl
Signal

Definition at line 73 of file Gtp7QuadPll.vhd.

◆ drpWe

drpWe sl
Signal

Definition at line 74 of file Gtp7QuadPll.vhd.

◆ drpRdy

drpRdy sl
Signal

Definition at line 75 of file Gtp7QuadPll.vhd.

◆ drpAddr

drpAddr slv ( 7 downto 0 )
Signal

Definition at line 76 of file Gtp7QuadPll.vhd.

◆ drpDi

drpDi slv ( 15 downto 0 )
Signal

Definition at line 77 of file Gtp7QuadPll.vhd.

◆ drpDo

drpDo slv ( 15 downto 0 )
Signal

Definition at line 78 of file Gtp7QuadPll.vhd.

◆ gtpe2_common_0_i

gtpe2_common_0_i gtpe2_common
Instantiation

Definition at line 178 of file Gtp7QuadPll.vhd.

◆ u_axilitetodrp

u_axilitetodrp AxiLiteToDrp
Instantiation

Definition at line 205 of file Gtp7QuadPll.vhd.

The documentation for this class was generated from the following file: