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XauiReg Entity Reference
Inheritance diagram for XauiReg: Collaboration diagram for XauiReg:Entities | |
| XauiReg.rtl | architecture |
Libraries | |
| ieee | |
| surf | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_unsigned | |
| std_logic_arith | |
| StdRtlPkg | Package <StdRtlPkg> |
| AxiLitePkg | Package <AxiLitePkg> |
| EthMacPkg | Package <EthMacPkg> |
| XauiPkg | Package <XauiPkg> |
Generics | |
| TPD_G | time := 1 ns |
| EN_AXI_REG_G | boolean := false |
Ports | ||
| localMac | in | slv ( 47 downto 0 ) := MAC_ADDR_INIT_C |
| axiClk | in | sl |
| axiRst | in | sl |
| axiReadMaster | in | AxiLiteReadMasterType |
| axiReadSlave | out | AxiLiteReadSlaveType |
| axiWriteMaster | in | AxiLiteWriteMasterType |
| axiWriteSlave | out | AxiLiteWriteSlaveType |
| phyClk | in | sl |
| phyRst | in | sl |
| config | out | XauiConfig |
| status | in | XauiStatus |
The documentation for this design unit was generated from the following file:
- ethernet/XauiCore/core/rtl/XauiReg.vhd
