UartSem.mapping Architecture Reference

Architecture >> UartSem::mapping

Signals
wrData	sl
wrValid	sl
wrFull	sl
wrReady	sl
rdData	sl
rdValid	sl
rdEmpty	sl
rdReady	sl
semIb	SemIbType := SEM_IB_INIT_C
semOb	SemObType

Instantiations
u_sem	SemWrapper <Entity SemWrapper>
u_uart	UartWrapper <Entity UartWrapper>

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The documentation for this design unit was generated from the following file:

• xilinx/7Series/sem/rtl/UartSem.vhd