SyncStatusVector.rtl Architecture Reference

Architecture >> SyncStatusVector::rtl

Processes
comb	( irqEnIn , r , rdRst , statusStrobe )
seq	( rdClk , rdRst )
comb	( irqEnIn , r , rdRst , statusStrobe )
seq	( rdClk , rdRst )

Constants
REG_INIT_C	RegType := ( not ( OUT_POLARITY_G ) , ( others = > ' 0 ' ) )

Signals
r	RegType := REG_INIT_C
rin	RegType
statusStrobe	slv ( WIDTH_G- 1 downto 0 )

Records
RegType

Instantiations
syncvec_inst	SynchronizerVector <Entity SynchronizerVector>
synconeshotcntvec_inst	SynchronizerOneShotCntVector <Entity SynchronizerOneShotCntVector>
syncvec_inst	SynchronizerVector <Entity SynchronizerVector>
synconeshotcntvec_inst	SynchronizerOneShotCntVector <Entity SynchronizerOneShotCntVector>

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The documentation for this design unit was generated from the following files:

• base/sync/rtl/SyncStatusVector.vhd
• build/SRC_VHDL/surf/SyncStatusVector.vhd