Sy89297 Entity Reference

Entities
Sy89297.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
AxiLitePkg	Package <AxiLitePkg>

Generics
TPD_G	time := 1 ns
SIMULATION_G	boolean := false

Ports
enableL	out	sl
enaL	out	sl
enbL	out	sl
sdata	out	sl
sclk	out	sl
sload	out	sl
axilClk	in	sl
axilRst	in	sl
axilReadMaster	in	AxiLiteReadMasterType
axilReadSlave	out	AxiLiteReadSlaveType
axilWriteMaster	in	AxiLiteWriteMasterType
axilWriteSlave	out	AxiLiteWriteSlaveType

---

The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Sy89297.vhd
• devices/Microchip/sy89297/rtl/Sy89297.vhd