SugoiSubordinateSimModel Entity Reference

Inheritance diagram for SugoiSubordinateSimModel:

Collaboration diagram for SugoiSubordinateSimModel:

Entities
SugoiSubordinateSimModel.mapping	architecture

Libraries
ieee
surf
ruckus
unisim

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
AxiLitePkg	Package <AxiLitePkg>
BuildInfoPkg	Package <BuildInfoPkg>
vcomponents

Generics
TPD_G	time := 1 ns
NUM_ADDR_BITS_G	positive := 16

Ports
clkInP	in	sl
clkInN	in	sl
rxP	in	sl
rxN	in	sl
txP	out	sl
txN	out	sl
clkOutP	out	sl
clkOutN	out	sl
linkup	out	sl
rst	out	sl
rstL	out	sl
opCode	out	slv ( 7 downto 0 )

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The documentation for this design unit was generated from the following file:

• protocols/sugoi/tb/SugoiSubordinateSimModel.vhd