SURF
Loading...
Searching...
No Matches
StreamPatternTester Entity Reference

Entities

StreamPatternTester.rtl  architecture
 

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
numeric_std 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>
AxiStreamPkg  Package <AxiStreamPkg>

Generics

TPD_G  time := 1 ns
NUM_CHANNELS_G  integer range 1 to 128 := 8

Ports

clk   in   std_logic
rst   in   std_logic
adcStreams   in   AxiStreamMasterArray ( NUM_CHANNELS_G- 1 downto 0 )
axilWriteMaster   in   AxiLiteWriteMasterType
axilWriteSlave   out   AxiLiteWriteSlaveType
axilReadMaster   in   AxiLiteReadMasterType
axilReadSlave   out   AxiLiteReadSlaveType

The documentation for this design unit was generated from the following file: