SsiPrbsRateGen.rtl Architecture Reference

Architecture >> SsiPrbsRateGen::rtl

Processes
comb	( axilReadMaster , axilWriteMaster , bandwidth , bandwidthMax , bandwidthMin , busy , frameRate , frameRateMax , frameRateMin , localRst , r )
seq	( localClk , localRst )
comb	( axilReadMaster , axilWriteMaster , bandwidth , bandwidthMax , bandwidthMin , busy , frameRate , frameRateMax , frameRateMin , localRst , r )
seq	( localClk , localRst )

Constants
REG_INIT_C	RegType := ( axilReadSlave = > AXI_LITE_READ_SLAVE_INIT_C , axilWriteSlave = > AXI_LITE_WRITE_SLAVE_INIT_C , trig = > ' 0 ' , packetLength = > ( others = > ' 0 ' ) , genPeriod = > ( others = > ' 0 ' ) , genEnable = > ' 0 ' , genOne = > ' 0 ' , genMissed = > ( others = > ' 0 ' ) , genCount = > ( others = > ' 0 ' ) , frameCount = > ( others = > ' 0 ' ) , statReset = > ' 0 ' )

Signals
r	RegType := REG_INIT_C
rin	RegType
iAxisMaster	AxiStreamMasterType
iAxisSlave	AxiStreamSlaveType
frameRate	slv ( 31 downto 0 )
frameRateMax	slv ( 31 downto 0 )
frameRateMin	slv ( 31 downto 0 )
bandwidth	slv ( 63 downto 0 )
bandwidthMax	slv ( 63 downto 0 )
bandwidthMin	slv ( 63 downto 0 )
busy	sl
localClk	sl
localRst	sl

Records
RegType

Instantiations
u_prbstx	SsiPrbsTx <Entity SsiPrbsTx>
u_monitor	AxiStreamMon <Entity AxiStreamMon>
u_prbstx	SsiPrbsTx <Entity SsiPrbsTx>
u_monitor	AxiStreamMon <Entity AxiStreamMon>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/SsiPrbsRateGen.vhd
• protocols/ssi/rtl/SsiPrbsRateGen.vhd