RssiAxiLiteRegItfWrapper.mapping Architecture Reference

Architecture >> RssiAxiLiteRegItfWrapper::mapping

Signals
axilRstN	sl
axilReadMaster	AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
axilReadSlave	AxiLiteReadSlaveType := AXI_LITE_READ_SLAVE_INIT_C
axilWriteMaster	AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
axilWriteSlave	AxiLiteWriteSlaveType := AXI_LITE_WRITE_SLAVE_INIT_C
appRssiParam	RssiParamType := RSSI_PARAM_INIT_C
negRssiParam	RssiParamType := RSSI_PARAM_INIT_C
frameRate	Slv32Array ( 1 downto 0 )
bandwidth	Slv64Array ( 1 downto 0 )

Instantiations
u_axil	SlaveAxiLiteIpIntegrator <Entity SlaveAxiLiteIpIntegrator>
u_dut	RssiAxiLiteRegItf <Entity RssiAxiLiteRegItf>

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The documentation for this design unit was generated from the following file:

• protocols/rssi/v1/wrappers/RssiAxiLiteRegItfWrapper.vhd