PgpRxVcFifo.mapping Architecture Reference

Architecture >> PgpRxVcFifo::mapping

Processes
BLOWOFF_FILTER	( pgpRxMaster , rxlinkReady )
BLOWOFF_FILTER	( pgpRxMaster , rxlinkReady )

Signals
pgpMaster	AxiStreamMasterType
axisReset	sl
pgpReset	sl

Instantiations
u_axisrst	RstPipeline <Entity RstPipeline>
u_pgprst	RstPipeline <Entity RstPipeline>
u_fifo	AxiStreamFifoV2 <Entity AxiStreamFifoV2>
u_axisrst	RstPipeline <Entity RstPipeline>
u_pgprst	RstPipeline <Entity RstPipeline>
u_fifo	AxiStreamFifoV2 <Entity AxiStreamFifoV2>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/PgpRxVcFifo.vhd
• protocols/pgp/shared/PgpRxVcFifo.vhd