Pgp4TxLiteWrapper.mapping Architecture Reference

Architecture >> Pgp4TxLiteWrapper::mapping

Signals
pgpTxIn	Pgp4TxInType := ( disable = > ' 0 ' , flowCntlDis = > ' 1 ' , resetTx = > ' 0 ' , skpInterval = > ( others = > ' 0 ' ) , opCodeEn = > ' 0 ' , opCodeData = > ( others = > ' 0 ' ) , locData = > ( others = > ' 0 ' ) )
pgpTxMaster	AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
pgpTxSlave	AxiStreamSlaveType
rstL	sl

Instantiations
u_pgp4txlite	Pgp4TxLite <Entity Pgp4TxLite>
u_pgp4txlite	Pgp4TxLite <Entity Pgp4TxLite>

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Pgp4TxLiteWrapper.vhd
• protocols/pgp/pgp4/core/rtl/Pgp4TxLiteWrapper.vhd