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Jesd204bRxWrapper.rtl Architecture Reference
Architecture >> Jesd204bRxWrapper::rtl

Signals

s_axilReadMaster  AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
s_axilReadSlave  AxiLiteReadSlaveType := AXI_LITE_READ_SLAVE_INIT_C
s_axilWriteMaster  AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
s_axilWriteSlave  AxiLiteWriteSlaveType := AXI_LITE_WRITE_SLAVE_INIT_C
s_jesdGtRxArr  jesdGtRxLaneTypeArray ( L_G- 1 downto 0 )
s_sampleDataArr  sampleDataArray ( L_G- 1 downto 0 )
s_dataValidVec  slv ( L_G- 1 downto 0 )
s_rxPolarity  slv ( L_G- 1 downto 0 )

Instantiations

u_axil  SlaveAxiLiteIpIntegrator <Entity SlaveAxiLiteIpIntegrator>
u_dut  Jesd204bRx <Entity Jesd204bRx>

The documentation for this design unit was generated from the following file: