HeartbeatTb.testbed Architecture Reference

Architecture >> HeartbeatTb::testbed

Signals
clkIn	slv ( 2 downto 0 )
clkOut	slv ( 2 downto 0 )

Instantiations
clk_0	ClkRst <Entity ClkRst>
clk_1	ClkRst <Entity ClkRst>
clk_2	ClkRst <Entity ClkRst>
heartbeat_0	Heartbeat <Entity Heartbeat>
heartbeat_1	Heartbeat <Entity Heartbeat>
heartbeat_2	Heartbeat <Entity Heartbeat>
clk_0	ClkRst <Entity ClkRst>
clk_1	ClkRst <Entity ClkRst>
clk_2	ClkRst <Entity ClkRst>
heartbeat_0	Heartbeat <Entity Heartbeat>
heartbeat_1	Heartbeat <Entity Heartbeat>
heartbeat_2	Heartbeat <Entity Heartbeat>

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The documentation for this design unit was generated from the following files:

• base/general/tb/HeartbeatTb.vhd
• build/SRC_VHDL/surf/HeartbeatTb.vhd