Architecture >> EthMacTxExportXgmii::rtl
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PROCESS_215 | ( intPad , macMaster ) |
PROCESS_216 | ( ethClk ) |
PROCESS_217 | ( curState , exportWordCnt , intLastLine , macMaster ) |
PROCESS_218 | ( curState , ethRst , exportWordCnt , intError , macMaster , phyReady , stateCount ) |
PROCESS_219 | ( ethClk ) |
PROCESS_220 | ( ethClk ) |
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INTERGAP_C | slv ( 3 downto 0 ) := x " 3 " |
AXI_CONFIG_C | AxiStreamConfigType := ( TSTRB_EN_C = > INT_EMAC_AXIS_CONFIG_C.TSTRB_EN_C , TDATA_BYTES_C = > 8 , TDEST_BITS_C = > INT_EMAC_AXIS_CONFIG_C.TDEST_BITS_C , TID_BITS_C = > INT_EMAC_AXIS_CONFIG_C.TID_BITS_C , TKEEP_MODE_C = > INT_EMAC_AXIS_CONFIG_C.TKEEP_MODE_C , TUSER_BITS_C = > INT_EMAC_AXIS_CONFIG_C.TUSER_BITS_C , TUSER_MODE_C = > INT_EMAC_AXIS_CONFIG_C.TUSER_MODE_C ) |
ST_IDLE_C | slv ( 2 downto 0 ) := " 000 " |
ST_DUMP_C | slv ( 2 downto 0 ) := " 001 " |
ST_READ_C | slv ( 2 downto 0 ) := " 010 " |
ST_WAIT_C | slv ( 2 downto 0 ) := " 011 " |
ST_PAD_C | slv ( 2 downto 0 ) := " 100 " |
The documentation for this design unit was generated from the following file:
- ethernet/EthMacCore/rtl/EthMacTxExportXgmii.vhd