EthMacTxExportXgmii Entity Reference

Inheritance diagram for EthMacTxExportXgmii:

Collaboration diagram for EthMacTxExportXgmii:

Entities
EthMacTxExportXgmii.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
AxiStreamPkg	Package <AxiStreamPkg>
StdRtlPkg	Package <StdRtlPkg>
EthMacPkg	Package <EthMacPkg>

Generics
TPD_G	time := 1 ns
SYNTH_MODE_G	string := " inferred "

Ports
ethClk	in	sl
ethRst	in	sl
macObMaster	in	AxiStreamMasterType
macObSlave	out	AxiStreamSlaveType
phyTxd	out	slv ( 63 downto 0 )
phyTxc	out	slv ( 7 downto 0 )
phyReady	in	sl
txCountEn	out	sl
txUnderRun	out	sl
txLinkNotReady	out	sl

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The documentation for this design unit was generated from the following file:

• ethernet/EthMacCore/rtl/EthMacTxExportXgmii.vhd