EthMacCrcAxiStreamWrapperRecv.rtl Architecture Reference

Architecture >> EthMacCrcAxiStreamWrapperRecv::rtl

Components
mkCrcRawAxiStreamCustomRecv

Signals
blueRstN	sl
bluetValidSlave	sl
bluetDataSlave	slv ( 255 downto 0 )
bluetKeepSlave	slv ( 31 downto 0 )
bluetUserSlave	sl
bluetLastSlave	sl
bluetReadySlave	sl
bluetDataMaster	slv ( 31 downto 0 )
bluetValidMaster	sl
bluetReadyMaster	sl

Instantiations
masteraxistreamipintegrator_1	MasterAxiStreamIpIntegrator <Entity MasterAxiStreamIpIntegrator>
slaveaxistreamipintegrator_1	SlaveAxiStreamIpIntegrator <Entity SlaveAxiStreamIpIntegrator>
mkcrcrawaxistreamcustomrecv_1	mkcrcrawaxistreamcustomrecv

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The documentation for this design unit was generated from the following file:

• ethernet/RoCEv2/rtl/EthMacCrcAxiStreamWrapperRecv.vhd