SURF
Loading...
Searching...
No Matches
BoxcarIntegratorTb.testbed Architecture Reference
Architecture >> BoxcarIntegratorTb::testbed

Processes

PROCESS_203  ( clk )
PROCESS_204 
PROCESS_205  ( clk )
PROCESS_206  ( failed , passed )

Constants

TPD_G  time := 2 . 5 ns
DOB_REG_C  boolean := true

Signals

clk  sl := ' 0 '
rst  sl := ' 0 '
intCount  slv ( 9 downto 0 )
obPeriod  sl
obValid  sl
obFull  sl
obData  slv ( 25 downto 0 )
validCnt  slv ( 15 downto 0 )
validEn  sl
dataIn  slv ( 15 downto 0 )
expData0  slv ( 25 downto 0 )
expData1  slv ( 25 downto 0 )
expData2  slv ( 25 downto 0 )
expError  sl
spacing  slv ( 15 downto 0 )
passed  sl := ' 0 '
failed  sl := ' 0 '

Instantiations

u_clkrst  ClkRst <Entity ClkRst>
u_boxcarintegrator  BoxcarIntegrator <Entity BoxcarIntegrator>

The documentation for this design unit was generated from the following file: