BoxcarIntegrator Entity Reference

Inheritance diagram for BoxcarIntegrator:

Collaboration diagram for BoxcarIntegrator:

Entities
BoxcarIntegrator.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
numeric_std
StdRtlPkg	Package <StdRtlPkg>

Generics
TPD_G	time := 1 ns
RST_ASYNC_G	boolean := false
SIGNED_G	boolean := false
DOB_REG_G	boolean := false
DATA_WIDTH_G	positive := 16
ADDR_WIDTH_G	positive := 10

Ports
clk	in	sl
rst	in	sl
intCount	in	slv ( ADDR_WIDTH_G- 1 downto 0 )
ibValid	in	sl := ' 1 '
ibData	in	slv ( DATA_WIDTH_G- 1 downto 0 )
obValid	out	sl
obAck	in	sl := ' 1 '
obData	out	slv ( DATA_WIDTH_G+ ADDR_WIDTH_G- 1 downto 0 )
obFull	out	sl
obPeriod	out	sl

---

The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/BoxcarIntegrator.vhd
• dsp/generic/fixed/BoxcarIntegrator.vhd