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AxiStreamPipelineTb.testbed Architecture Reference
Architecture >> AxiStreamPipelineTb::testbed

Processes

comb  ( mAxisMaster , r , rst , sAxisSlave )
seq  ( clk )
PROCESS_11  ( failed , passed )
comb  ( mAxisMaster , r , rst , sAxisSlave )
seq  ( clk )
PROCESS_92  ( failed , passed )

Constants

CLK_PERIOD_C  time := 4 ns
TPD_C  time := CLK_PERIOD_C/ 4
PIPE_STAGES_C  natural := 1
MAX_CNT_C  slv ( AXI_STREAM_MAX_TDATA_WIDTH_C- 1 downto 0 ) := resize ( x " 000000000000000019999997E241C000 " , AXI_STREAM_MAX_TDATA_WIDTH_C )
PRBS_TAPS_C  NaturalArray := ( 0 = > 31 , 1 = > 6 , 2 = > 2 , 3 = > 1 )
REG_INIT_C  RegType := ( passed = > ' 0 ' , failed = > ' 0 ' , wrPbrs = > x " AE64B770 " , wrSof = > ' 1 ' , wrPkt = > ( others = > ' 0 ' ) , wrCnt = > ( others = > ' 0 ' ) , wrSize = > ( others = > ' 0 ' ) , rdPbrs = > x " 5E68B7E2 " , rdSof = > ' 1 ' , rdPkt = > ( others = > ' 0 ' ) , rdCnt = > ( others = > ' 0 ' ) , rdSize = > ( others = > ' 0 ' ) , sAxisMaster = > AXI_STREAM_MASTER_INIT_C , mAxisSlave = > AXI_STREAM_SLAVE_INIT_C )

Signals

r  RegType := REG_INIT_C
rin  RegType
mAxisMaster  AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
mAxisSlave  AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
sAxisMaster  AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C
sAxisSlave  AxiStreamSlaveType := AXI_STREAM_SLAVE_INIT_C
clk  sl := ' 0 '
rst  sl := ' 0 '
passed  sl := ' 0 '
failed  sl := ' 0 '

Records

RegType 

Instantiations

clkrst_inst  ClkRst <Entity ClkRst>
axistreampipeline_inst  AxiStreamPipeline <Entity AxiStreamPipeline>
clkrst_inst  ClkRst <Entity ClkRst>
axistreampipeline_inst  AxiStreamPipeline <Entity AxiStreamPipeline>

The documentation for this design unit was generated from the following files: